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{"id":7085423001780,"title":"Major Brands 74LS138 3-to-8 Decoder\/Demultiplexer, Dip 16, 21ns, 32mW (Pack of 10)","handle":"major-brands-74ls138-3-to-8-decoder-demultiplexer-dip-16-21ns-32mw-pack-of-10","description":"\u003ch3\u003eMajor Brands 74LS138 3-to-8 Decoder\/Demultiplexer, Dip 16, 21ns, 32mW (Pack of 10)\u003c\/h3\u003e\n\u003cp id=\"b\"\u003eThis schottky-clamped circuit is designed to be used in high-performance\nmemory-decoding or data-routing applications, requiring very short propagation\ndelay times. In high-performance memory systems these decoders can be used to\nminimize effects of system decoding. When used with high-speed memories, the\ndelay time of this decoder is usually less than the typical access time of the\nmemory. This means that the effective system delay introduced by the decoder\nis negligible. The dm74ls138 decodes one-of-eight lines, based upon the\nconditions at the three binary Select inputs and the three enable inputs. Two\nactive-low and one active-high enable inputs reduce the need for external\nGates or inverters when expanding. A 24-line decoder can be implemented with\nno external inverters, and a 32-line decoder requires only one inverter. An\nenable input can be used as a data input for demultiplexing applications. This\ndecoder\/demultiplexer features fully buffered inputs, presenting only one\nnormalized load to its driving circuit. All inputs are clamped with high-\nperformance schottky diodes to suppress line-ringing and simplify system\ndesign.\u003c\/p\u003e \n\n\u003ch3\u003eProduct Features\u003c\/h3\u003e\n \u003cul class=\"a\"\u003e\n \u003cli\u003eDesigned specifically for high-speed memory decoders and data transmission systems\u003c\/li\u003e\n \u003cli\u003eIncorporates 3 enable inputs to simplify cascading and\/or data reception\u003c\/li\u003e\n \u003cli\u003eSchottky clamped for high performance\u003c\/li\u003e\n \u003cli\u003eTypical propagation delay (3 levels of logic): 21Ns\u003c\/li\u003e\n \u003cli\u003eTypical power dissipation: 32Mw\u003c\/li\u003e\n \u003c\/ul\u003e\n\n","published_at":"2022-03-17T23:40:53+11:00","created_at":"2022-03-17T23:40:53+11:00","vendor":"MAJOR BRANDS","type":"Digital Signal Processors","tags":["auspowers_batchone"],"price":9500,"price_min":9500,"price_max":9500,"available":true,"price_varies":false,"compare_at_price":null,"compare_at_price_min":0,"compare_at_price_max":0,"compare_at_price_varies":false,"variants":[{"id":41332415824052,"title":"Default Title","option1":"Default Title","option2":null,"option3":null,"sku":"B00B88E3FQ","requires_shipping":true,"taxable":true,"featured_image":null,"available":true,"name":"Major Brands 74LS138 3-to-8 Decoder\/Demultiplexer, Dip 16, 21ns, 32mW (Pack of 10)","public_title":null,"options":["Default Title"],"price":9500,"weight":42,"compare_at_price":null,"inventory_management":null,"barcode":"74LS138","requires_selling_plan":false,"selling_plan_allocations":[]}],"images":["\/\/auspowers.com\/cdn\/shop\/products\/B00B88E3FQ.jpg?v=1648538557"],"featured_image":"\/\/auspowers.com\/cdn\/shop\/products\/B00B88E3FQ.jpg?v=1648538557","options":["Title"],"media":[{"alt":"[Australia - AusPower] - Major Brands 74LS138 3-to-8 Decoder\/Demultiplexer, Dip 16, 21ns, 32mW (Pack of 10) ","id":25343349326004,"position":1,"preview_image":{"aspect_ratio":1.0,"height":400,"width":400,"src":"\/\/auspowers.com\/cdn\/shop\/products\/B00B88E3FQ.jpg?v=1648538557"},"aspect_ratio":1.0,"height":400,"media_type":"image","src":"\/\/auspowers.com\/cdn\/shop\/products\/B00B88E3FQ.jpg?v=1648538557","width":400}],"requires_selling_plan":false,"selling_plan_groups":[],"content":"\u003ch3\u003eMajor Brands 74LS138 3-to-8 Decoder\/Demultiplexer, Dip 16, 21ns, 32mW (Pack of 10)\u003c\/h3\u003e\n\u003cp id=\"b\"\u003eThis schottky-clamped circuit is designed to be used in high-performance\nmemory-decoding or data-routing applications, requiring very short propagation\ndelay times. In high-performance memory systems these decoders can be used to\nminimize effects of system decoding. When used with high-speed memories, the\ndelay time of this decoder is usually less than the typical access time of the\nmemory. This means that the effective system delay introduced by the decoder\nis negligible. The dm74ls138 decodes one-of-eight lines, based upon the\nconditions at the three binary Select inputs and the three enable inputs. Two\nactive-low and one active-high enable inputs reduce the need for external\nGates or inverters when expanding. A 24-line decoder can be implemented with\nno external inverters, and a 32-line decoder requires only one inverter. An\nenable input can be used as a data input for demultiplexing applications. This\ndecoder\/demultiplexer features fully buffered inputs, presenting only one\nnormalized load to its driving circuit. All inputs are clamped with high-\nperformance schottky diodes to suppress line-ringing and simplify system\ndesign.\u003c\/p\u003e \n\n\u003ch3\u003eProduct Features\u003c\/h3\u003e\n \u003cul class=\"a\"\u003e\n \u003cli\u003eDesigned specifically for high-speed memory decoders and data transmission systems\u003c\/li\u003e\n \u003cli\u003eIncorporates 3 enable inputs to simplify cascading and\/or data reception\u003c\/li\u003e\n \u003cli\u003eSchottky clamped for high performance\u003c\/li\u003e\n \u003cli\u003eTypical propagation delay (3 levels of logic): 21Ns\u003c\/li\u003e\n \u003cli\u003eTypical power dissipation: 32Mw\u003c\/li\u003e\n \u003c\/ul\u003e\n\n"}
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Major Brands 74LS138 3-to-8 Decoder/Demultiplexer, Dip 16, 21ns, 32mW (Pack of 10)

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Major Brands 74LS138 3-to-8 Decoder/Demultiplexer, Dip 16, 21ns, 32mW (Pack of 10)

This schottky-clamped circuit is designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize effects of system decoding. When used with high-speed memories, the delay time of this decoder is usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. The dm74ls138 decodes one-of-eight lines, based upon the conditions at the three binary Select inputs and the three enable inputs. Two active-low and one active-high enable inputs reduce the need for external Gates or inverters when expanding. A 24-line decoder can be implemented with no external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. This decoder/demultiplexer features fully buffered inputs, presenting only one normalized load to its driving circuit. All inputs are clamped with high- performance schottky diodes to suppress line-ringing and simplify system design.

Product Features

  • Designed specifically for high-speed memory decoders and data transmission systems
  • Incorporates 3 enable inputs to simplify cascading and/or data reception
  • Schottky clamped for high performance
  • Typical propagation delay (3 levels of logic): 21Ns
  • Typical power dissipation: 32Mw

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