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{"id":7086449983668,"title":"Major Brands 74LS139 Dual 2-to-4 Decoder\/Demultiplexer, Dip 16, 21NS (Pack of 10)","handle":"major-brands-74ls139-dual-2-to-4-decoder-demultiplexer-dip-16-21ns-pack-of-10","description":"\u003ch3\u003eMajor Brands 74LS139 Dual 2-to-4 Decoder\/Demultiplexer, Dip 16, 21NS (Pack of 10)\u003c\/h3\u003e\n\u003cp id=\"b\"\u003eThese schottky-clamped circuits are designed to be used in high-performance\nmemory-decoding or data-routing applications, requiring very short propagation\ndelay times. In high-performance memory systems these decoders can be used to\nminimize the effects of system decoding. When used with high-speed memories,\nthe delay times of these decoders are usually less than the typical access\ntime of the memory. This means that the effective system delay introduced by\nthe decoder is negligible. The dm74ls138 decodes one-of-eight lines, based\nupon the conditions at the three binary Select inputs and the three enable\ninputs. Two active-low and one active-high enable inputs reduce the need for\nexternal Gates or inverters when expanding. A 24-line decoder can be\nimplemented with no external inverters, and a 32-line decoder requires only\none inverter. An enable input can be used as a data input for demultiplexing\napplications. The dm74ls139 comprises two separate two-line-to-fourline\ndecoders in a single package. The active-low enable input can be used as a\ndata line in demultiplexing applications. All of these decoders\/demultiplexers\nfeature fully buffered inputs, presenting only one normalized load to its\ndriving circuit. All inputs are clamped with high-performance schottky diodes\nto suppress line-ringing and simplify system design.\u003c\/p\u003e \n\n\u003ch3\u003eProduct Features\u003c\/h3\u003e\n \u003cul class=\"a\"\u003e\n \u003cli\u003eDesigned specifically for high speed: memory decoders and data transmission systems\u003c\/li\u003e\n \u003cli\u003eDm74ls139 contains two fully independent 2-to-4-line decoders\/demultiplexers\u003c\/li\u003e\n \u003cli\u003eSchottky clamped for high performance\u003c\/li\u003e\n \u003cli\u003eTypical propagation delay (3 levels of logic): 21 nps\u003c\/li\u003e\n \u003c\/ul\u003e\n\n","published_at":"2022-03-19T00:04:19+11:00","created_at":"2022-03-19T00:04:19+11:00","vendor":"MAJOR BRANDS","type":"Buffer","tags":["auspowers_batchone"],"price":9400,"price_min":9400,"price_max":9400,"available":true,"price_varies":false,"compare_at_price":null,"compare_at_price_min":0,"compare_at_price_max":0,"compare_at_price_varies":false,"variants":[{"id":41335011410100,"title":"Default Title","option1":"Default Title","option2":null,"option3":null,"sku":"B00B88A2YM","requires_shipping":true,"taxable":true,"featured_image":null,"available":true,"name":"Major Brands 74LS139 Dual 2-to-4 Decoder\/Demultiplexer, Dip 16, 21NS (Pack of 10)","public_title":null,"options":["Default Title"],"price":9400,"weight":38,"compare_at_price":null,"inventory_management":null,"barcode":"74LS139","requires_selling_plan":false,"selling_plan_allocations":[]}],"images":["\/\/auspowers.com\/cdn\/shop\/products\/B00B88A2YM.jpg?v=1648570089"],"featured_image":"\/\/auspowers.com\/cdn\/shop\/products\/B00B88A2YM.jpg?v=1648570089","options":["Title"],"media":[{"alt":"[Australia - AusPower] - Major Brands 74LS139 Dual 2-to-4 Decoder\/Demultiplexer, Dip 16, 21NS (Pack of 10) ","id":25349662539956,"position":1,"preview_image":{"aspect_ratio":1.0,"height":400,"width":400,"src":"\/\/auspowers.com\/cdn\/shop\/products\/B00B88A2YM.jpg?v=1648570089"},"aspect_ratio":1.0,"height":400,"media_type":"image","src":"\/\/auspowers.com\/cdn\/shop\/products\/B00B88A2YM.jpg?v=1648570089","width":400}],"requires_selling_plan":false,"selling_plan_groups":[],"content":"\u003ch3\u003eMajor Brands 74LS139 Dual 2-to-4 Decoder\/Demultiplexer, Dip 16, 21NS (Pack of 10)\u003c\/h3\u003e\n\u003cp id=\"b\"\u003eThese schottky-clamped circuits are designed to be used in high-performance\nmemory-decoding or data-routing applications, requiring very short propagation\ndelay times. In high-performance memory systems these decoders can be used to\nminimize the effects of system decoding. When used with high-speed memories,\nthe delay times of these decoders are usually less than the typical access\ntime of the memory. This means that the effective system delay introduced by\nthe decoder is negligible. The dm74ls138 decodes one-of-eight lines, based\nupon the conditions at the three binary Select inputs and the three enable\ninputs. Two active-low and one active-high enable inputs reduce the need for\nexternal Gates or inverters when expanding. A 24-line decoder can be\nimplemented with no external inverters, and a 32-line decoder requires only\none inverter. An enable input can be used as a data input for demultiplexing\napplications. The dm74ls139 comprises two separate two-line-to-fourline\ndecoders in a single package. The active-low enable input can be used as a\ndata line in demultiplexing applications. All of these decoders\/demultiplexers\nfeature fully buffered inputs, presenting only one normalized load to its\ndriving circuit. All inputs are clamped with high-performance schottky diodes\nto suppress line-ringing and simplify system design.\u003c\/p\u003e \n\n\u003ch3\u003eProduct Features\u003c\/h3\u003e\n \u003cul class=\"a\"\u003e\n \u003cli\u003eDesigned specifically for high speed: memory decoders and data transmission systems\u003c\/li\u003e\n \u003cli\u003eDm74ls139 contains two fully independent 2-to-4-line decoders\/demultiplexers\u003c\/li\u003e\n \u003cli\u003eSchottky clamped for high performance\u003c\/li\u003e\n \u003cli\u003eTypical propagation delay (3 levels of logic): 21 nps\u003c\/li\u003e\n \u003c\/ul\u003e\n\n"}
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Major Brands 74LS139 Dual 2-to-4 Decoder/Demultiplexer, Dip 16, 21NS (Pack of 10)

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Major Brands 74LS139 Dual 2-to-4 Decoder/Demultiplexer, Dip 16, 21NS (Pack of 10)

These schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. The dm74ls138 decodes one-of-eight lines, based upon the conditions at the three binary Select inputs and the three enable inputs. Two active-low and one active-high enable inputs reduce the need for external Gates or inverters when expanding. A 24-line decoder can be implemented with no external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. The dm74ls139 comprises two separate two-line-to-fourline decoders in a single package. The active-low enable input can be used as a data line in demultiplexing applications. All of these decoders/demultiplexers feature fully buffered inputs, presenting only one normalized load to its driving circuit. All inputs are clamped with high-performance schottky diodes to suppress line-ringing and simplify system design.

Product Features

  • Designed specifically for high speed: memory decoders and data transmission systems
  • Dm74ls139 contains two fully independent 2-to-4-line decoders/demultiplexers
  • Schottky clamped for high performance
  • Typical propagation delay (3 levels of logic): 21 nps

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